IBM hails new 'block of flats' design breakthrough for ultra tiny chips
IBM has announced a breakthrough in chip design, likening a new transistor architecture to a "block of flats" for its vertical stacking approach. This design aims to continue shrinking chip size beyond current limits, improving performance and energy efficiency for future ultra-tiny processors.
Background
- IBM announced a breakthrough in chip design: it has developed a way to place transistors (the tiny switches in a processor) in a 3D stack, like a "block of flats" (apartment building), rather than spreading them out flat on a silicon wafer.
- This allows for more transistors in the same physical footprint, which can mean more powerful and energy-efficient chips — critical for AI, cloud computing, and mobile devices.
- The race to shrink transistors (Moore's Law) has been slowing as manufacturers hit physical limits of miniaturisation; 3D stacking is one of the key strategies to keep improving chip performance without having to make features smaller.
- IBM is a major R&D player in semiconductors, though it no longer manufactures its own chips at scale; it licenses its innovations to partners like Samsung and Intel. This announcement is about a test chip (2nm node equivalent), not a product you can buy today.